Why GPU and HBM Supply Is Still Broken in 2026 — CoWoS, 2nm, and What's Next
Why every major supplier says demand will outstrip capacity — no matter how much they spend.
The AI supply chain is not being constrained by one shortage. It is being constrained by several capacity limits hitting at the same time: advanced packaging, high-bandwidth memory, and leading-edge foundry nodes.
That is what made the latest supplier commentary so important. TSMC, SK hynix, Micron, Samsung, NVIDIA, and AMD are all pointing to the same reality from different parts of the stack: demand for AI infrastructure is rising faster than the industry can add capacity.
For procurement teams, this changes the way AI-related components need to be planned, especially as agentic AI workloads reshape demand for memory, GPUs, advanced packaging, and infrastructure. CoWoS, HBM3E, HBM4, 3nm, and early 2nm capacity are no longer isolated pressure points. They are connected constraints that will influence pricing, lead times, allocation, and product availability through 2026 and into 2027.
1. CoWoS Is the Packaging Constraint Behind the AI Buildout
CoWoS, or Chip-on-Wafer-on-Substrate, is TSMC’s advanced packaging platform for integrating logic chiplets with high-bandwidth memory in high-performance AI and HPC applications.
TSMC’s public commentary shows that this constraint is not just about wafer starts. In its Q3 2025 earnings commentary, the company said it was working to narrow the gap between CoWoS demand and supply while continuing to increase capacity in 2026. It also described AI-related frontend and backend capacity as very tight.
That distinction matters. Even if more leading-edge wafers become available, AI accelerators still require backend packaging capacity before they can ship as finished systems. For GPUs, AI accelerators, and custom ASICs, packaging is no longer a secondary step. It is one of the main gating factors.
NVIDIA’s own commentary points to the same pressure. The company has said Blackwell demand is expected to exceed supply for several quarters, while also noting supply constraints across Hopper and Blackwell systems.
The same pattern extends beyond NVIDIA. AMD’s Instinct MI355X is built for AI and HPC workloads, uses TSMC 3nm and 6nm FinFET lithography, and includes 288GB of HBM3E. Products like this show how advanced-node logic, HBM, and advanced packaging are now tied together in the same supply chain equation.
For procurement teams, the takeaway is simple: CoWoS capacity needs to be treated as part of the component availability picture. A supplier may have wafer access, but without packaging capacity, finished AI hardware can still be delayed.
2. HBM Is Sold Out Through 2026 (HBM3E Included)
High-bandwidth memory remains one of the tightest components in the AI stack. HBM3E is central to current-generation accelerators, while HBM4 is becoming a major planning priority for next-generation AI systems.
SK hynix reported record quarterly performance in Q3 2025 driven by HBM and high-performance server products. The company also said HBM supply discussions for the following year had been completed and that HBM4 shipments would begin in Q4 2025.
Micron’s fiscal Q1 2026 materials also point to sustained tightness. The company said strong demand and supply constraints are contributing to tight market conditions that it expects to persist beyond calendar 2026. Micron also noted that HBM demand is putting additional pressure on the broader memory supply environment because of the trade ratio between HBM and DDR5, and that it had completed price and volume agreements for its entire calendar 2026 HBM supply.
Samsung is seeing the same demand pattern. In Q3 2025, Samsung said its Memory Business reached record quarterly revenue, driven by HBM3E and server SSD growth. The company also said HBM3E was in mass production and being sold to related customers, while HBM4 samples were being shipped to key clients.
The challenge is that HBM is not easy to scale. Applied Materials has noted that the HBM manufacturing flow adds around 19 materials-engineering steps to the conventional DRAM process, including processes tied to through-silicon vias and advanced interconnect structures.
This complexity is one reason HBM shortages can ripple into the rest of the memory market. As suppliers prioritize HBM, DDR5, server DRAM, and high-value AI-related products, procurement teams may see pressure spread into adjacent memory categories.
Pricing pressure is already showing up in industry reporting. TrendForce reported 2026 HBM3E price increases tied to continued demand from NVIDIA H200, custom ASICs, and hyperscale AI programs.
The key point is not just that HBM is tight. It is that HBM capacity is now being planned years in advance by AI system builders. Buyers that wait for spot availability may find themselves competing against customers that locked allocation much earlier.
3. Advanced-Node Capacity Is Under the Same Pressure
Advanced logic capacity is also becoming a limiting factor. AI accelerators, networking ASICs, custom cloud chips, and high-performance CPUs are all competing for leading-edge foundry capacity, especially at 3nm and early 2nm.
TSMC’s Q1 2026 results show how central advanced nodes have become to the company’s revenue mix. In the first quarter, 3nm contributed 25% of wafer revenue, while advanced technologies defined as 7nm and below accounted for 74% of wafer revenue. TSMC also noted that inventory reflected the ramp-up of 2nm technology and strong demand for 3nm.
Industry reporting points to an even wider supply-demand gap. Tom’s Hardware reported a reported advanced-node capacity shortfall as AI demand continues to outpace available leading-edge capacity. That should be framed as reported commentary, not as a formal capacity forecast, but it reinforces the broader market signal: advanced-node demand is still running ahead of supply.
Samsung is also positioning its foundry roadmap around advanced nodes and AI-related demand. In its Q3 2025 results, Samsung said its Foundry Business was ramping 2nm GAA products and HBM4 base die and planned to focus on stable supply of new 2nm GAA products and HBM4 base die in 2026.
This creates a broader planning challenge, especially as T-glass and advanced substrate constraints become more closely tied to AI growth. The industry is not simply waiting for more 3nm or 2nm wafers. It also needs the packaging capacity, HBM supply, substrate availability, test capacity, and qualified manufacturing flows required to turn those wafers into finished AI systems.
Suppliers Agree: If They Had More Capacity, They Could Sell 20–50% More
In past semiconductor cycles, shortages often centered on one product category, one supplier, or one demand spike. The AI cycle looks different because the constraint is built into the architecture of the hardware itself.
A leading AI accelerator depends on multiple scarce inputs:
- leading-edge logic capacity
- HBM3E or HBM4 supply
- advanced packaging capacity
- substrates and assembly capacity
- power and thermal components
- qualification windows with hyperscalers and OEMs
If any one of those layers is constrained, the final product can be delayed.
This is why supplier commentary across the ecosystem is converging. TSMC is pointing to tight frontend and backend capacity. NVIDIA is pointing to Blackwell demand above supply. SK hynix, Micron, and Samsung are pointing to sustained AI memory demand and tight memory conditions. AMD’s latest accelerator roadmap shows how much performance now depends on the combination of advanced nodes and HBM.
The result is a more complicated procurement environment. Buyers are no longer managing a single shortage. They are managing a stack of dependencies.
What Procurement Leaders Need to Do Now
Procurement teams should adjust their planning around four realities.
First, treat CoWoS and advanced packaging as allocation-sensitive capacity. Packaging access should be part of any conversation about AI accelerator availability.
Second, plan for continued HBM and DRAM pricing pressure. HBM3E and HBM4 demand is pulling capacity toward AI applications, and that can affect broader memory availability.
Third, build longer planning windows for advanced-node logic. 3nm and early 2nm capacity will remain heavily contested as AI accelerators, custom ASICs, and high-performance compute platforms scale.
Fourth, qualify alternatives where possible. Multi-supplier strategies across memory, logic, and supporting components can reduce exposure to a single constrained source.
The teams that will be best positioned in 2026 and 2027 are the ones building visibility now, not the ones waiting for lead times to normalize.
The Bottom Line
The next phase of AI hardware growth will be shaped by three connected constraints: CoWoS, HBM, and advanced-node wafer capacity.
Each one is difficult to scale on its own. Together, they create a supply chain environment where AI demand can remain strong even as finished hardware availability stays limited.
For procurement teams, this means AI-related sourcing needs to be planned earlier, modeled more carefully, and managed across the full stack. The companies that understand where the bottlenecks sit will be better prepared to secure supply, manage cost exposure, and respond as capacity shifts through 2027.
Want to understand what is next for AI-driven demand?
Our latest Intelligence Report on Agentic AI: Preparing for the Hybrid Infrastructure Surge explores how emerging AI workloads are reshaping memory, GPUs, advanced packaging, and broader infrastructure demand, and what procurement leaders need to plan for as these trends evolve.
1. Why is CoWoS capacity the main bottleneck for AI chips right now?
CoWoS (Chip-on-Wafer-on-Substrate) is the critical packaging process that enables HBM to sit next to GPUs and AI accelerators. Even if wafer supply increases, chips cannot be assembled without CoWoS capacity. TSMC, NVIDIA, and multiple OSATs reported that CoWoS is oversubscribed through at least 2026, making it the single tightest part of the AI semiconductor stack.
2. How long will HBM shortages last?
Based on Q3 earnings calls from SK Hynix, Micron, and Samsung, HBM supply is fully allocated through 2026, including HBM3E. Both demand growth and manufacturing complexity limit how quickly suppliers can expand output. Early signals suggest tightness could extend into 2027, especially as hyperscalers and GPU vendors secure long-term contracts.
3. What is driving the surge in demand for HBM3E and high-bandwidth memory?
AI infrastructure requires higher memory bandwidth and lower latency than traditional DRAM can provide. New architectures such as NVIDIA Blackwell and AMD MI355 depend on HBM3E stacking. As AI workloads continue to scale, HBM becomes the performance limiter — and thus the hardest-to-source component.
4. Why is advanced-node capacity (3nm / 2nm) failing to meet demand?
TSMC reported that advanced-node wafer demand is “about three times” greater than its available supply, driven by AI accelerators, networking ASICs, and power-efficient CPUs. Even with record capex, ramping new nodes takes years, not quarters. As a result, 3nm and early 2nm availability remains structurally constrained.
5. How will these shortages impact pricing for AI components?
Suppliers have already signaled upward pricing pressure. Samsung expects high-teens to low-20% price increases for HBM in 2026 contracts. Limited CoWoS slots and oversubscribed wafer starts will also support elevated pricing for advanced-node logic and next-generation accelerators.
6. Are shortages concentrated only in AI products, or will other markets feel the impact?
AI is absorbing most of the incremental supply for HBM, CoWoS, and 3nm wafers — but the ripple effects extend much further. Suppliers warn of broader DRAM tightness, longer lead times for networking ASICs, and reduced availability for high-performance CPUs used in telecom, cloud, and storage systems.
7. Can alternative memory (e.g., GDDR6, DDR5) offset HBM constraints?
Not for AI training or high-end inference. HBM’s bandwidth and power efficiency are essential for accelerator performance, meaning GDDR6 and DDR5 cannot replace HBM for these workloads. In some mid-tier applications, however, customers may shift to GDDR-based designs as a stopgap.
8. Are new fabs or packaging facilities likely to relieve constraints?
Not in the near term. Even with aggressive investment from TSMC, Samsung, Micron, and OSATs, meaningful CoWoS and HBM expansion will take 12–24 months. Rumored long-term moves — such as Broadcom evaluating its own fab strategy — would not impact supply until 2027 or later.
9. What procurement strategies are most effective during an HBM and CoWoS shortage?
Teams are prioritizing:
- Early allocation commitments with suppliers
- Multi-supplier qualification for memory (Micron + SK Hynix + Samsung)
- Buffer inventory for critical AI-related components
- Flexibility across logic SKUs and power-management devices
- Visibility into long-term build plans
Being proactive is essential; suppliers universally confirmed demand far exceeds near-term capacity.
10. How long will these structural constraints last?
Most suppliers expect tight conditions through 2026, with some signals pointing into 2027. Because the demand is structural—not cyclical—capacity expansion is unlikely to outpace AI adoption over the next two years.